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 FDP39N20 200V N-Channel MOSFET
UniFET
FDP39N20
200V N-Channel MOSFET Features
* 39A, 300V, RDS(on) = 0.066 @VGS = 10 V * Low gate charge ( typical 38 nC) * Low Crss ( typical 57 pF) * Fast switching * 100% avalanche tested * Improved dv/dt capability
TM
Description
These N-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for high efficient switched mode power supplies and active power factor correction.
D
G GDS
TO-220
FQP Series
S
Absolute Maximum Ratings
Symbol
VDSS ID IDM VGSS EAS IAR EAR dv/dt PD TJ, TSTG TL Drain-Source Voltage Drain Current Drain Current Gate-Source voltage Single Pulsed Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TC = 25C) - Derate above 25C
(Note 2) (Note 1) (Note 1) (Note 3)
Parameter
- Continuous (TC = 25C) - Continuous (TC = 100C) - Pulsed
(Note 1)
FDP39N20
200 39 23.4 156 30 860 39 25.1 4.5 251 2.0 -55 to +150 300
Unit
V A A A V mJ A mJ V/ns W W/C C C
Operating and Storage Temperature Range Maximum Lead Temperature for Soldering Purpose, 1/8" from Case for 5 Seconds
Thermal Characteristics
Symbol
RJC RCS RJA
Parameter
Thermal Resistance, Junction-to-Case Thermal Resistance, Case-to-Sink Thermal Resistance, Junction-to-Ambient
Min.
-0.5 --
Max.
0.50 -62.5
Unit
C/W C/W C/W
(c)2005 Fairchild Semiconductor Corporation
1
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FDP39N20 Rev. A
FDP39N20 200V N-Channel MOSFET
Package Marking and Ordering Information
Device Marking
FDP39N20
Device
FDP39N20
Package
TO-220
TC = 25C unless otherwise noted
Reel Size
-
Tape Width
-
Quantity
50
Electrical Characteristics
Symbol
Off Characteristics BVDSS BVDSS / TJ IDSS IGSSF IGSSR VGS(th) RDS(on) gFS Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd IS ISM VSD trr Qrr
NOTES:
Parameter
Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage Current, Forward Gate-Body Leakage Current, Reverse Gate Threshold Voltage Static Drain-Source On-Resistance Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge
Conditions
VGS = 0V, ID = 250A ID = 250A, Referenced to 25C VDS = 200V, VGS = 0V VDS = 160V, TC = 125C VGS = 30V, VDS = 0V VGS = -30V, VDS = 0V VDS = VGS, ID = 250A VGS = 10V, ID = 19.5A VDS = 40V, ID = 19.5A VDS = 25V, VGS = 0V, f = 1.0MHz
(Note 4)
Min.
200 -----3.0 ------
Typ.
-0.2 -----0.056 28.5 1640 400 57 30 160 150 150 38 11 16.5
Max Units
--1 10 100 -100 5.0 0.066 -2130 520 85 70 330 310 310 49 --V V/C A A nA nA V S pF pF pF ns ns ns ns nC nC nC
On Characteristics
Dynamic Characteristics
Switching Characteristics VDD = 100V, ID = 39A RG = 25
(Note 4, 5)
------(Note 4, 5)
VDS = 160V, ID = 39A VGS = 10V
--
Drain-Source Diode Characteristics and Maximum Ratings Maximum Continuous Drain-Source Diode Forward Current Maximum Pulsed Drain-Source Diode Forward Current Drain-Source Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0V, IS = 39A VGS = 0V, IS = 39A dIF/dt =100A/s
(Note 4)
------
---152 1.1
39 156 1.4 ---
A A V ns C
1. Repetitive Rating: Pulse width limited by maximum junction temperature 2. L = 0.85mH, IAS = 39A, VDD = 50V, RG = 25, Starting TJ = 25C 3. ISD 39A, di/dt 200A/s, VDD BVDSS, Starting TJ = 25C 4. Pulse Test: Pulse width 300s, Duty Cycle 2% 5. Essentially Independent of Operating Temperature Typical Characteristics
FDP39N20 Rev. A
2
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FDP39N20 200V N-Channel MOSFET
Typical Performance Characteristics
Figure 1. On-Region Characteristics
VGS 15.0 V 10.0 V 8.0 V 7.0 V 6.5 V 6.0 V Bottom : 5.5 V Top :
Figure 2. Transfer Characteristics
10
2
10
2
ID, Drain Current [A]
10
1
ID, Drain Current [A]
10
1
150 C 25 C -55 C
Notes : 1. VDS = 40V 2. 250s Pulse Test
o o
o
10
0
Notes : 1. 250s Pulse Test 2. TC = 25
10
-1
10
0
10
1
10
0
2
4
6
8
10
12
VDS, Drain-Source Voltage [V]
VGS, Gate-Source Voltage [V]
Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperatue
0.14
10
2
RDS(ON) [ ], Drain-Source On-Resistance
0.10
0.08
VGS = 10V
IDR, Reverse Drain Current [A]
0.12
10
1
150 25
0.06
VGS = 20V
Note : TJ = 25
0.04 0 25 50 75
Notes : 1. VGS = 0V 2. 250 Pulse Test s
100
125
10
0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
ID, Drain Current [A]
VSD, Source-Drain voltage [V]
Figure 5. Capacitance Characteristics
12
4000
Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd
Figure 6. Gate Charge Characteristics
VGS, Gate-Source Voltage [V]
10
VDS = 40V VDS = 100V VDS = 160V
Coss
Capacitances [pF]
8
Ciss
2000
6
4
Crss
Note ; 1. VGS = 0 V 2. f = 1 MHz
2
Note : ID = 39A
0 -1 10
10
0
10
1
0
0
10
20
30
40
50
60
VDS, Drain-Source Voltage [V]
QG, Total Gate Charge [nC]
FDP39N20 Rev. A
3
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FDP39N20 200V N-Channel MOSFET
Typical Performance Characteristics (Continued)
Figure 7. Breakdown Voltage Variation vs. Temperature
1.2
Figure 8. On-Resistance Variation vs. Temperature
3.0
BVDSS, (Normalized) Drain-Source Breakdown Voltage
1.1
RDS(ON), (Normalized) Drain-Source On-Resistance
2.5
2.0
1.0
1.5
1.0
Notes : 1. VGS = 10 V 2. ID = 19.5 A
0.9
Notes : 1. VGS = 0 V A 2. ID = 250
0.5
0.8 -100
-50
0
50
100
o
150
200
0.0 -100
-50
0
50
100
o
150
200
TJ, Junction Temperature [ C]
TJ, Junction Temperature [ C]
Figure 9. Maximum Safe Operating Area
Figure 10. Maximum Drain Current vs. Case Temperature
40
10
3
10 s
10
2
ID, Drain Current [A]
10
1
10
0
Operation in This Area is Limited by R DS(on)
ID, Drain Current [A]
100 s 1 ms 10 ms 100 ms DC
30
20
Notes :
10
-1
1. TC = 25 C 2. TJ = 150 C 3. Single Pulse
o
o
10
10
-2
10
0
10
1
10
2
0 25
50
75
100
125
150
VDS, Drain-Source Voltage [V]
TC, Case Temperature [ ]
Figure 11. Transient Thermal Response Curve
ZJC Thermal Response (t),
D = 0 .5
10
-1
0 .2 0 .1 0 .0 5 0 .0 2 0 .0 1
N o te s : 1 . Z J C t) = 0 .5 /W M a x . ( 2 . D u ty F a c to r , D = t 1 /t 2 3 . T J M - T C = P D M * Z J C t) (
PDM t1
s in g le p u ls e
10
-2
t2
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
t 1 , S q u a r e W a v e P u ls e D u r a tio n [s e c ]
FDP39N20 Rev. A
4
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FDP39N20 200V N-Channel MOSFET
Gate Charge Test Circuit & Waveform
Resistive Switching Test Circuit & Waveforms
Unclamped Inductive Switching Test Circuit & Waveforms
FDP39N20 Rev. A
5
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FDP39N20 200V N-Channel MOSFET
Peak Diode Recovery dv/dt Test Circuit & Waveforms
FDP39N20 Rev. A
6
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FDP39N20 200V N-Channel MOSFET
Mechanical Dimensions (Continued)
TO-220
Dimensions in Millimeters
FDP39N20 Rev. A
7
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FDP39N20 200V N-Channel MOSFET
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACExTM ActiveArrayTM BottomlessTM Build it NowTM CoolFETTM CROSSVOLTTM DOMETM EcoSPARKTM E2CMOSTM EnSignaTM
FACTTM FACT Quiet SeriesTM FAST(R) FASTrTM FPSTM FRFETTM GlobalOptoisolatorTM GTOTM HiSeCTM I2CTM
Across the board. Around the world.TM The Power Franchise(R) Programmable Active DroopTM
i-LoTM ImpliedDisconnectTM IntelliMAXTM ISOPLANARTM LittleFETTM MICROCOUPLERTM MicroFETTM MicroPakTM MICROWIRETM MSXTM MSXProTM OCXTM OCXProTM OPTOLOGIC(R) OPTOPLANARTM
PACMANTM POPTM Power247TM PowerEdgeTM PowerSaverTM PowerTrench(R) QFET(R) QSTM QT OptoelectronicsTM Quiet SeriesTM RapidConfigureTM RapidConnectTM SerDesTM SILENT SWITCHER(R) SMART STARTTM
SPMTM StealthTM SuperFETTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TinyLogic(R) TINYOPTOTM TruTranslationTM UHCTM UltraFET(R) UniFETTM VCXTM WireTM
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS Definition of Terms
Datasheet Identification Advance Information Product Status Formative or In Design First Production Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. I16
Preliminary
No Identification Needed
Full Production
Obsolete
Not In Production
8 FDP39N20 Rev. A
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